Chapter 23. Intel 80960 Dependent Features

141

Some opcodes are processed beyond simply emitting a single corresponding instruction:

callj

, and

Compare and Branch or Compare and Jump instructions with target displacements larger than 13

bits.

23.4.1.

callj

You can write

callj

to have the assembler or the linker determine the most appropriate form of sub 

routine call:

call

,

bal

, or

calls

. If the assembly source contains enough information  a

.leafproc

or

.sysproc

directive defining the operand  then

as

translates the

callj

; if not, it simply emits the

callj

, leaving it for the linker to resolve.

23.4.2. Compare and Branch

The 960 architectures provide combined Compare and Branch instructions that permit you to store

the branch target in the lower 13 bits of the instruction word itself. However, if you specify a branch

target far enough away that its address won't fit in 13 bits, the assembler can either issue an error,

or convert your Compare and Branch instruction into separate instructions to do the compare and the

branch.

Whether

as

gives an error or expands the instruction depends on two choices you can make: whether

you use the

 no relax

option, and whether you use a "Compare and Branch" instruction or a "Com 

pare and Jump" instruction. The "Jump" instructions are always expanded if necessary; the "Branch"

instructions are expanded when necessary unless you specify

 no relax

  in which case

as

gives an

error instead.

These are the Compare and Branch instructions, their "Jump" variants, and the instruction pairs they

may expand into: