Chapter 13.

ARM Dependent Features

13.1. Options

 mcpu=processor[+extension...]

This option specifies the target processor. The assembler will issue an error message if an

attempt is made to assemble an instruction which will not execute on the target processor. The

following processor names are recognized:

arm1

,

arm2

,

arm250

,

arm3

,

arm6

,

arm60

,

arm600

,

arm610

,

arm620

,

arm7

,

arm7m

,

arm7d

,

arm7dm

,

arm7di

,

arm7dmi

,

arm70

,

arm700

,

arm700i

,

arm710

,

arm710t

,

arm720

,

arm720t

,

arm740t

,

arm710c

,

arm7100

,

arm7500

,

arm7500fe

,

arm7t

,

arm7tdmi

,

arm7tdmi s

,

arm8

,

arm810

,

strongarm

,

strongarm1

,

strongarm110

,

strongarm1100

,

strongarm1110

,

arm9

,

arm920

,

arm920t

,

arm922t

,

arm940t

,

arm9tdmi

,

arm9e

,

arm926e

,

arm926ej s

,

arm946e r0

,

arm946e

,

arm966e r0

,

arm966e

,

arm10t

,

arm10e

,

arm1020

,

arm1020t

,

arm1020e

,

arm1026ej s

,

arm1136j s

,

arm1136jf s

,

ep9312

(ARM920 with Cirrus Maverick coprocessor),

i80200

(Intel

XScale processor)

iwmmxt

(Intel(r) XScale processor with Wireless MMX(tm) technology

coprocessor) and

xscale

. The special name

all

may be used to allow the assembler to accept

instructions valid for any ARM processor.

In addition to the basic instruction set, the assembler can be told to accept various extension

mnemonics that extend the processor using the co processor instruction space. For example,

 mcpu=arm920+maverick

is equivalent to specifying

 mcpu=ep9312

. The following exten 

sions are currently supported:

+maverick +iwmmxt

and

+xscale

.

 march=architecture[+extension...]

This option specifies the target architecture. The assembler will issue an error message if an at 

tempt is made to assemble an instruction which will not execute on the target architecture. The

following architecture names are recognized:

armv1

,

armv2

,

armv2a

,

armv2s

,

armv3

,

armv3m

,

armv4

,

armv4xm

,

armv4t

,

armv4txm

,

armv5

,

armv5t

,

armv5txm

,

armv5te

,

armv5texp

,

armv6

,

armv6j

,

iwmmxt

and

xscale

. If both

 mcpu

and

 march

are specified, the assembler

will use the setting for

 mcpu

.

The architecture option can be extended with the same instruction set extension options as the

 mcpu

option.

 mfpu=floating point format

This option specifies the floating point format to assemble for. The assembler will issue an error

message if an attempt is made to assemble an instruction which will not execute on the target

floating point unit. The following format options are recognized:

softfpa

,

fpe

,

fpe2

,

fpe3

,

fpa

,

fpa10

,

fpa11

,

arm7500fe

,

softvfp

,

softvfp+vfp

,

vfp

,

vfp10

,

vfp10 r0

,

vfp9

,

vfpxd

,

arm1020t

,

arm1020e

,

arm1136jf s

and

maverick

.

In addition to determining which instructions are assembled, this option also affects the way in

which the

.double

assembler directive behaves when assembling little endian code.

The default is dependent on the processor selected. For Architecture 5 or later, the default is

to assembler for VFP instructions; for earlier architectures the default is to assemble for FPA

instructions.