Index

283

S

SH support, see Chapter 35 Renesas / SuperH SH De 

pendent Features

search path for .include, see Section 3.5

SH64 ABI options, see Section 36.1 Options

.includeSearch Path:  Ipath

SH64 addressing modes, see Section 36.2.3 Address 

sect directive, AMD 29K, see Section 10.4 AMD

ing Modes

29K Machine Directives

SH64 ISA options, see Section 36.1 Options

sect directive, MSP 430, see Section 31.4 MSP 430

SH64 line comment character, see Section 36.2.1 Spe 

Machine Directives

cial Characters

sect directive, TIC54X, see Section 38.9 Directives

SH64 line separator, see Section 36.2.1 Special Char 

section directive (COFF version), see Section 8.78

acters

.section

name

SH64 machine directives, see Section 36.3 SH64 Ma 

section directive (ELF version), see Section 8.78

chine Directives

.section

name

SH64 opcode summary, see Section 36.4 Opcodes

section directive, V850, see Section 41.4 V850 Ma 

SH64 options, see Section 36.1 Options

chine Directives

SH64 registers, see Section 36.2.2 Register Names

section override prefixes, i386, see Section 21.5 In 

SH64 support, see Chapter 36 SuperH SH64 Depen 

struction Prefixes

dent Features

Section Stack, see Section 8.89 .subsection

name

shigh directive, M32R, see Section 25.2 M32R Di 

Section Stack, see Section 8.78 .section

name

rectives

Section Stack, see Section 8.73 .pushsection

short

directive,

see

Section

8.80

.short

name

,

subsection

expressions

Section Stack, see Section 8.68 .popsection

short directive, ARC, see Section 12.4 ARC Machine

Section Stack, see Section 8.67 .previous

Directives

section relative addressing, see Section 5.1 Back 

short directive, TIC54X, see Section 38.9 Directives

ground

SIMD, i386, see Section 21.9 Intel's MMX and

sections, see Chapter 5 Sections and Relocation

AMD's 3DNow! SIMD Operations

sections in messages, internal, see Section 5.3 Assem 

SIMD, x86 64, see Section 21.9 Intel's MMX and

bler Internal Sections

AMD's 3DNow! SIMD Operations

sections, i386, see Section 21.2 AT&T Syntax versus

single character constant, see Section 4.6.1.2 Charac 

Intel Syntax

ters

sections, named, see Section 5.2 Linker Sections

single

directive, see Section 8.81 .single

sections, x86 64, see Section 21.2 AT&T Syntax ver 

flonums

sus Intel Syntax

single directive, i386, see Section 21.8 Floating

seg directive, SPARC, see Section 37.4 Sparc Ma 

Point

chine Directives

single directive, x86 64, see Section 21.8 Floating

segm, see Section 39.3 Assembler Directives for the

Point

Z8000

sixteen bit integers, see Section 8.43 .hword

set directive, see Section 8.79 .set

symbol

,

expressions

expression

sixteen byte integer, see Section 8.64 .octa

bignums

set directive, M88K, see Section 28.1 M88K Ma 

size directive (COFF version), see Section 8.82

chine Directives

.size

set directive, TIC54X, see Section 38.9 Directives

size directive (ELF version), see Section 8.82 .size

SH addressing modes, see Section 35.2.3 Addressing

size modifiers, D10V, see Section 15.2.1 Size Modi 

Modes

fiers

SH floating point (ieee), see Section 35.3 Floating

size modifiers, D30V, see Section 16.2.1 Size Modi 

Point

fiers

SH line comment character, see Section 35.2.1 Special

size modifiers, M680x0, see Section 26.2 Syntax

Characters

size prefixes, i386, see Section 21.5 Instruction Pre 

SH line separator, see Section 35.2.1 Special Charac 

fixes

ters

size suffixes, H8/300, see Section 17.5 Opcodes

SH machine directives, see Section 35.4 SH Machine

sizes operands, i386, see Section 21.2 AT&T Syntax

Directives

versus Intel Syntax

SH opcode summary, see Section 35.5 Opcodes

sizes operands, x86 64, see Section 21.2 AT&T Syntax

SH options, see Section 35.1 Options

versus Intel Syntax

SH registers, see Section 35.2.2 Register Names

skip directive, see Section 8.84 .skip

size

,

fill