Index

267

ARC machine directives, see Section 12.4 ARC Ma 

ARM opcodes, see Section 13.5 Opcodes

chine Directives

ARM options (none), see Section 13.1 Options

ARC opcodes, see Section 12.5 Opcodes

ARM register names, see Section 13.2.2 Register

ARC options (none), see Section 12.1 Options

Names

ARC register names, see Section 12.2.2 Register

ARM support, see Chapter 13 ARM Dependent Fea 

Names

tures

ARC special characters, see Section 12.2.1 Special

ascii

directive,

see

Section

8.4

.ascii

Characters

"

string

". . .

ARC support, see Chapter 12 ARC Dependent Fea 

asciz

directive,

see

Section

8.5

.asciz

tures

"

string

". . .

arc5 arc5, ARC, see Section 12.1 Options

asg directive, TIC54X, see Section 38.9 Directives

arc6 arc6, ARC, see Section 12.1 Options

assembler bugs, reporting, see Section 43.2 How to

arc7 arc7, ARC, see Section 12.1 Options

Report Bugs

arc8 arc8, ARC, see Section 12.1 Options

assembler crash, see Section 43.1 Have You Found a

arch directive, i386, see Section 21.12 Specifying

Bug?

CPU Architecture

assembler directive .dword, CRIS, see Section 14.3.4

arch directive, x86 64, see Section 21.12 Specifying

Assembler Directives

CPU Architecture

assembler directive .far, M68HC11, see Section 27.4

architecture options, i960, see Section 23.1 i960

Assembler Directives

Command line Options

assembler directive .interrupt, M68HC11, see Section

architecture options, IP2022, see Section 24.1 IP2K

27.4 Assembler Directives

Options

assembler directive .mode, M68HC11, see Section

architecture options, IP2K, see Section 24.1 IP2K Op 

27.4 Assembler Directives

tions

assembler directive .relax, M68HC11, see Section

architecture options, M32R, see Section 25.1 M32R

27.4 Assembler Directives

Options

assembler directive .syntax, CRIS, see Section 14.3.4

architecture options, M32R2, see Section 25.1 M32R

Assembler Directives

Options

assembler directive .xrefb, M68HC11, see Section

architecture options, M32RX, see Section 25.1 M32R

27.4 Assembler Directives

Options

architecture options, M680x0, see Section 26.1

assembler directive BSPEC, MMIX, see Section

M680x0 Options

30.3.4 Assembler Directives

architectures, PowerPC, see Section 34.1 Options

assembler directive BYTE, MMIX, see Section 30.3.4

architectures, SPARC, see Section 37.1 Options

Assembler Directives

arguments for addition, see Section 7.2.4 Infix Opera 

assembler directive ESPEC, MMIX, see Section

tors

30.3.4 Assembler Directives

arguments for subtraction, see Section 7.2.4 Infix Op 

assembler directive GREG, MMIX, see Section 30.3.4

erators

Assembler Directives

arguments in expressions, see Section 7.2.1 Argu 

assembler directive IS, MMIX, see Section 30.3.4 As 

ments

sembler Directives

arithmetic functions, see Section 7.2.2 Operators

assembler directive LOC, MMIX, see Section 30.3.4

arithmetic operands, see Section 7.2.1 Arguments

Assembler Directives

arm directive, ARM, see Section 13.4 ARM Machine

assembler directive LOCAL, MMIX, see Section

Directives

30.3.4 Assembler Directives

ARM floating point (ieee), see Section 13.3 Floating

assembler directive OCTA, MMIX, see Section 30.3.4

Point

Assembler Directives

ARM identifiers, see Section 13.2.1 Special Charac 

assembler directive PREFIX, MMIX, see Section

ters

30.3.4 Assembler Directives

ARM immediate character, see Section 13.2.1 Special

assembler directive TETRA, MMIX, see Section

Characters

30.3.4 Assembler Directives

ARM line comment character, see Section 13.2.1 Spe 

assembler directive WYDE, MMIX, see Section

cial Characters

30.3.4 Assembler Directives

ARM line separator, see Section 13.2.1 Special Char 

assembler directives, CRIS, see Section 14.3.4 Assem 

acters

bler Directives

ARM machine directives, see Section 13.4 ARM Ma 

assembler directives, M68HC11, see Section 27.4 As 

chine Directives

sembler Directives